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    Cadence IP combination and tools support TSMC's new ultra-low power platform

    Cadence design systems today announced that its rich IP portfolio and digital and custom / analog design tools can support TSMC's new ultra low power (ULP) technology platform. The ULP platform covers multiple process nodes that provide a variety of power-saving ways to facilitate the low-power requirements of the latest mobile and consumer electronics products.


    In order to accelerate the technical development of TSMC's ultra-low power platform, cadence will migrate the design IP including memory, interface and analog functions to this platform. Using cadence tensilia ò data plane processor, customers can benefit from a variety of low-power DSP applications from ultra-low-power platform, including image, always online voice, face recognition and baseband processing. In addition, in terms of supporting ultra-low power design, cadence's tool portfolio includes all products of digital, analog, custom and mixed signal IC design.


    "For low-power mobile and consumer products to establish a continuous leading edge, customers must have efficient processing technology, such as our ultra-low power technology platform," said Li Shuo, senior director of TSMC's design infrastructure marketing department, So that we can provide a complete design tool and IP ecosystem for our common customers, and promote and accelerate the development of design innovation. "


    Xu Jiping, senior vice president and chief strategy officer of cadence, pointed out: "TSMC's ultra-low power platform is a very important step in today's consumer electronics design to meet the challenge of efficient energy. Our early investment in this ultra-low power platform and our long-term cooperation with TSMC have enabled cadence to quickly provide the IP and tools needed for the design of a new generation of consumer electronics products. "

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